LogisimRevisited

Components / Memory

Counter Component in Logisim

Synchronous N-bit binary up-counter that increments Q by 1 on each rising Clock edge and asserts overflow (ovf) at its maximum count (2^N - 1).

CTRCLKRSTQovf
Default settings, facing east. Pins are the dots.
LibraryMemory
Type nameCounter
Pins and defaultsclk CLK (-20, 20), rst RST (-10, 20), q Q (0, 0), cout ovf (0, 10), width 4 (1..32)

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How the Counter Works in Logisim

The Counter component is a synchronous N-bit binary up-counter (default width = 4 bits, counting 0x0 through 0xF). On every rising edge (0 → 1 transition) of the bottom-left Clock input (CLK), its stored count Q increments by 1 and wraps around from 2^N - 1 back to 0.

When the count reaches its maximum value of all ones (2^N - 1, such as 15 / 0xF for a 4-bit counter), the 1-bit overflow output pin (ovf, at offset 0, 10) asserts High (1). Driving the bottom-right Reset pin (RST) High (1) asynchronously resets Q to 0.

Tip: Connect a Counter’s Q bus to the address input (A) of a ROM to step automatically through a sequence of microcode instructions or display patterns.

Counter Pins & Pinout

PinDirectionWidthLocation & Role
clk (CLK)Input (Bottom-left)1 bitOffset (-20, 20). Rising-edge (0 → 1) clock input that increments the count by 1.
rst (RST)Input (Bottom-right)1 bitOffset (-10, 20). Asynchronous active-high reset (clears count Q to 0 immediately).
q (Q)Output (Upper-right)1–32 bits (default 4)Offset (0, 0). Current N-bit binary count (0 to 2^N - 1).
cout (ovf)Output (Lower-right)1 bitOffset (0, 10). Terminal count / overflow flag: outputs 1 when Q equals 2^N - 1.

Counter Truth Table & Behavior

4-Bit Counter state progression (width = 4)
RSTCLK EdgeCurrent QNext Qovf (Terminal Count)
1AnyAny0x0 (0)0
0↑ (0 → 1)0x0 (0)0x1 (1)0
0↑ (0 → 1)0xE (14)0xF (15)1 (max count reached)
0↑ (0 → 1)0xF (15)0x0 (0, wraps)0

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